The current source points of all stages will be connected through high-impedance low pass filter of about 1kHz cutoff (to be able to measure scintillation). A dummy cascade from 1 BFR91A transistor will be used to get a reference no-signal level. These wll be buffered with high input impedance opamps and subtracted on an opamp capable of low rail output swing.
CA3240 will be used for high input impedace, capability to output near ground, temperature range and because it is a double package.
Since the emitter drop is temperature dependent, it needs compensation. Since there is a 1V drop on the 390 Ohm resistors, it needs 4V for base. So there will be a divider and the emission coefficient will also be multiplied by 4/5. The NE of BFR91A is 1.51. 1N4148 has 1.906 which when multiplied by 4/5 gives just 1.52! :)
I will put base and collector resistors like normal there to prevent oscillations. The 6.8k in the base will also simulate the same voltage drop as in the real differential stage. The emitter resistor will be set to 2.5mA. In the real circuit the emitter voltage is 3.99 and 4.05 respectively average 4.02. We need 1.6k. Now we have to make a tap 390 Ohm away from the top end. That makes 1.2k lower and 390 upper.
However this would compensate thermal changes only 75%. Thererfore I will put a divider into the base and set it to 4V.
What is the output impedance of the current source? The Early voltage is 51V according to BFR91A model. There is about 1V drop on the 390 resistors and the emitters have 4V, therefore the current source is running at 3V and 5mA. That makes 10.8 kOhm impedance. I will use 4.7M this will be 500 times the impedance. I will not use 10M not to make it too sensitive to dirt etc.
There will be 3 stages therefore 3 capacitors. What total capacity do we need to form a RC lowpass with the 4.7 M? 33pF. One capacitor is then 10pF. With the 200fF resistor parasitic this makes a 50x divider or 34dB attenuation per stage at high frequencies. The 1.25nH of the capacitor inductivity makes 78.5 Ohm inductance @10GHz and 200fF makes 79.5 Ohm. That's only 1:2 or 6dB. To get more we need to put a 15nH coil in series with the resistor between stages. Then the attenuation at 10GHz is 12 or 21.5dB. Now the 15nH will resonate with the parasitic capacitance somewhere in gigahertz range, but I will fix this later.
Now let's select the interstage resistors. To make it behave like one capacitor they should be substantially lower than 4.7M. Let's say 100k. What's the RC lowpass cutoff of 100k and 10pF? 159kHz. What's the attenuation of 10Mhz from one branch to another? First 50x divider from 200fF and 10pF, then another one 50x, then 200fF and 1pF, that's 50x50x5=12500.
The input impedance is 1500M and if I have 3 resistors 4.7M that's 1.5M or 1000x less. Since there is like 3V that makes 3mV. Offset voltage is 2mV typ.
The current 5mA gets divided into 2x2.5mA in idle state. When one side rises and the other falls, the emitter voltage follows always the rising side, but this effect is diminished to drop voltage resulting from doubling the current. BFR91A has NE of 1.51. Therefore the voltage drop will be ln(2)*NE*Vt=27.2mV.
The first stage is special since one halfcycle rises the emitter voltage and the other halfcycle leaves it on idle level minus 27.2mV. If the input signal has Vpp value of V, the DC rise on the emitters is then (V/2-27.2mV)/2-27.2mV/2= V/4-27.2mV. Let's assume voltage drop of 0.7V on the limitting diodes 6x 1N4148. The maximum Vpp of the input is then 6*0.7V=4.2V. The resulting DC rise is then 1.023V.
There are 2 more stages without any special input. Their RSSI response is then Vrise-27.2mV. Vrise is voltage rise from idle state of any of the two input lines. It's 2.5mA*470Ohm=1.175 Volt. Counting 27.2mV it is 1.148V.
Now there are 2 normal stages and one input. The RSSI signals are averaged. This gives 1.106V DC rise on the input of RSSI amplifier.
The minimum supply voltage is 10.8V. The datasheet guarantees max. 3V drop from the upper rail at 30V supply, let's take the same number for 10.8V supply. That's 7.8V max. Since the input swing is 1.106V, the maximum allowed gain of the difference amplifier is 7.05x. This is only if the amplifier has exactly zero offset. Since in practice there will be an offset, this gain should be even lower.
There will be only small load from the divider on the lower rail. For sink current 200uA and 5V supply and 25degC the saturation voltage is 0.4V. Whole temperature info is not available. I will estimate it based on available data as 0.4V.
The total emitter current of the working transistors is 5mA and the reference is 130uA, making a 38.5 times difference. The base resistance seen by this working current is 6800/2+100=3500. That makes 134.75 kOhm for the reference base. We take 120k because it's closer.
BFR91A has typical gain 100: Planeta 120, Vishay and Philips 90. 130uA will make base current 1.3uA and 156mV. This has to be subtracted from 5V, reducing the emitter current from 130uA to 125uA. Now we have to recalculate the base resistor drop: the difference is 40 times, 140k, now closer is 150k and the resulting drop is 187.5mV. The current is now 125uA again and we can stop the iteration.
Now what is the voltage drop on the 390R resistors we have to eliminate? It's 2.5mA*390=975mV. The current through the reference transistor is 125uA. That's 20 times less than the working transistors. With NE=1.51 this will create additional drop ln(20)*Vt*NE=0.118V. The reference will be 118mV higher therefore diminishing the 975mV which will become 857mV. A compensation for this typical offset has to be built into the difference amplifier.
Maximum allowed gain (zero output offset) of the difference amplifier is 7.05x. This amplifies the typical offset of 875mV to 6.17V. The zero of the difference amplifier should be hooked to 6.17V reference to zero this offset out. However, this would be impractical, because it's more than 5V reference we already have so I would have to add another regulator. For this I will decrease the gain so that I can use 5V directly for the difference. The gain will be then reduced to 5.71x. Now we still have to calculate maximum possible input offset, and reduce the gain further.
The LED for the LED-Photoresistor optocoupler of Rhodopsin is taking the current from the 5V rail through the filters. This will creaet an unpredictable drop that will influence the RSSI. Therefore I have changed the Rhodopsin to take the power from 12V and tested if it doesn't oscillate with this change. It doesn't, great!
What causes the biggest offset? Let's define the offset as difference as difference of the input voltage into the RSSI amplifier as compared to state with nominal component values. Positive meter output refers to positive offset, or higher working transistor voltage and lower reference transistor voltage make positive offset.
The emitter 390 Ohm drop will be 2.494V instead of 1.95V, an offset of -544mV. Working transistor bases total current will be 5.813mA/40=145uA instead of 4.99mA/100=49.9uA. This will cause drop on the 3k4 and 100 Ohm resistors 559mV instead of the usual 175mV, offset of -384mV.
The reference transistor base current will be how many less than normal? 300/100*36.3/33=3.3x smaller. The base current of the working transistor is how many times bigger 145/49.9=2.906 times bigger.? This will cause reference voltage to rise and working voltage to fall, negative offset in both cases. The current ratio is 3.3*2.906=9.59. The voltage difference is ln 9.59*Vt*(NE=1.51)= -89mV.
How much offset from the 150k base resistor? Normal current is (5V-0.7V)/33k/100= 1.3uA with a drop on 150k making 195mV. Now the current will be (5V-0.7V)/36.3k/300= 395nA and drop on 135k 53mV. The reference rises, creating a negative offset of -142mV.
Now add the offsets: -544mV-384mV-89mV-142mV=1159mV. This is horrible! The working signal amplitude is 1106mV!
The -544mV offset can be significantly improved by using 1% 390 Ohm resistors. Making 150k and 33k 1% will bring only 6mV improvement. But they are not tripled so let's define them precision as well. The 384mV offset from the working transistor base resistors can be somewhat diminished by taking more precise values of 6k8 as well.
The emitter 390 Ohm drop will be 2.29V instead of 1.95V, an offset of -340mV. Working transistor bases total current will be 5.813mA/40=145uA instead of 4.99mA/100=49.9uA. This will cause drop on the 3k4 and 100 Ohm resistors 513mV instead of the usual 175mV, offset of -338mV.
The reference transistor base current will be how many less than normal? 300/100*33.3/33=3.03x smaller. The base current of the working transistor is how many times bigger? 145/49.9=2.906 times bigger. This will cause reference voltage to rise and working voltage to fall, negative offset in both cases. The current ratio is 3.03*2.906=8.805. The voltage difference is ln 9.59*Vt*(NE=1.51)= -85mV.
How much offset from the 150k base resistor? Normal current is (5V-0.7V)/33k/100= 1.3uA with a drop on 150k making 195mV. Now the current will be (5V-0.7V)/33.3k/300= 430nA and drop on 135k 64mV. The reference rises, creating a negative offset of -131mV.
Now add the offsets: -340mV-338mV-85mV-131mV=894mV. This is better! At least the offset is smaller than the signal ;-)
What about the offset to the other side? This calculation is a lot of work. For simplicity I will assume the offset the other way is the same.
| Input signal | +1106mV |
| Nominal input offset | -857mV |
| Additional minimum input offset | -894mV |
| Additional maximum input offset+894mV | |
| Absolute minimum input voltage | -1751mV |
| Absolute maximum input voltage | +1143mV |
| Input voltage range | 2894 mV |
| Upper output voltage range | 7800mV |
| Upper output voltage range | 400mV |
| Output voltage range | 7400mV |
| Output load type | Floating or against ground |
| Gain | 2.557 times |
| Output offset | 4877mV |
Amplification is 7400/2894=2.557 times. Input -1751mV gets mapped to 400mV and +1143mV gets mapped to 7800mV. What does 0mV map to? 4877mV. That's the output offset.
I will use 1% resistors in the dividers to not restrict the range further. I should use a slightly higher offset and less amplification to still fit into the range when the resistors are not exact. But I will ignore this because the range is already limited enough, the problem will happen only with very small probability and it will cut off only like max. few % off the range. The lower range is not important because the device has its own noise. The upper range will be when the device is saturated with signal and this is probably distorted anyway.
I will start around 150k with the upper offset divider resistor. 150k sets compromise between humidity resistance and power consumption. Then the lower one has to be 150k/(5V-offset)*offset=5.948M, offset=4877mV. I will use 5.6M and 330k, making 5.93M, an aberration of 0.3%.
The feedback resistor then will be a parallel combination of these two, 150k and 5.93M. The parallel combination is 146.3k. Times the gain 2.557 it makes the other resistor 374k. I will use a parallel combination 390k and 10M, which makes 375k, an aberration of only 0.3%.
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